The ASTEC Cluster on Distributed Embedded Real-Time Systems (CODER)

An afternoon seminarseries.
March 12th, starting at 13.15.

13.15: Introduction to the CODER cluster.
Jakob Engblom, Uppsala University.

13.30: Register Allocation for Embedded Architectures.
Sven-Olof Nyström, Uppsala University.
This talk will give a short introduction to compilation for embedded systems in general, and then focus on recent research on how to allocate registers on register-starved and irregular embedded processors. This research has been performed in close cooperation with IAR Systems.

14.20: Program Flow Analysis for Worst-Case Execution Time Analysis.
Jan Gustafsson, Mälardalens Högskola, Västerås.
Jan will give an introduction to WCET analysis overall. He will then go into details on the current work on analyzing real programs with complicated flows, unstructured code, and other real-life problems that have not before been addressed in flow analysis.

15.10: Simulation of a Distributed Real-Time System
Anders Möller, CC-systems.

Simulation in Windows using simulated peripheral devices, such as CAN controllers and memories is described. Two different approaches for how the simulation can be realized are discussed. One for an existing control system designed by Rolls-Royce AB used for ship propulsion, and one to simulate real time operating systems using an API-level simulation technique. A time control that can be used to control the execution speed in a distributed real time control system is presented. A more extensive abstract is here.

ASTEC seminar
March 12, 2003

Place: Information technology, Uppsala University
Room: 1111
Time: 13.15-16.00 (+ discussions)

Room 1111 is in building 1, floor 1, room 11 (in the southern part of the building).

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Everyone is welcome !

Updated 04-Mar-2003 16:57 by Roland Grönroos
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